VDB

CVE-2025-0647

CVE-2025-0647 PUBLISHED CVSS 7.9 HIGH

Reported by arm · Published January 14, 2026

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Risk scores

CVSS 3.1
7.9
CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N

Affected products

VendorProductVersions
ArmNeoverse-N20
ArmNeoverse-V3AE0
ArmNeoverse-V30
ArmNeoverse-V20
ArmCortex-X9250
ArmCortex-X40
ArmCortex-X30
ArmCortex-X20
ArmCortex-A7100
ArmC1-Premium0
ArmC1-Ultra0
ArmNeoverse-V3AE0
ArmC1-Ultra0
ArmCortex-X9250
ArmCortex-X40
ArmNeoverse-V20
ArmNeoverse-V30
ArmCortex-A7100
ArmCortex-X20
ArmCortex-X30

…and 2 more

Timeline

  • Jan 14, 2026 EPSS Score (30 in total, the first dated here)
  • Jan 14, 2026 CVE Published
  • Jan 14, 2026 PoC Published
  • Jun 2, 2026 Security Advisory
  • Jun 26, 2026 Coalition ESS Score

Query this with the API

The same record, from the CLI:

vulnetix vdb vuln CVE-2025-0647
vulnetix vdb fixes CVE-2025-0647

Or with curl, using the org id and key from your account page:

curl -s -H "Authorization: ApiKey ${VULNETIX_ORG_ID}:${VULNETIX_API_KEY}" \
  "https://api.vdb.vulnetix.com/v2/vuln/CVE-2025-0647/fixes/registry"

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References

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