VDB
ALPINE-CVE-2025-32086
ALPINE-CVE-2025-32086
PUBLISHED
CVSS 4.5 MEDIUM
Improperly implemented security check for standard in the DDRIO configuration for some Intel(R) Xeon(R) 6 Processors when using Intel(R) SGX or Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
Risk Scores
CVSS v4.0
4.5
CVSS:4.0/AV:L/AC:H/AT:N/PR:H/UI:N/VC:N/VI:N/VA:N/SC:H/SI:H/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
Affected Products
| Vendor | Product | Versions |
|---|---|---|
| Alpine:v3.21 | intel-ucode | 20130222-r0, 20170511-r0, 20180108-r0 |
| Alpine:v3.23 | intel-ucode | 0, 20130222-r0, 20170511-r0 |
| Alpine:v3.22 | intel-ucode | 20240813-r0, 20130222-r0, 20180312-r0 |
| Alpine:v3.19 | intel-ucode | 0, 20130222-r0, 20170511-r0 |
| Alpine:v3.20 | intel-ucode | 20221108-r0, 20230214-r0, 20230512-r0 |
Timeline
- Aug 12, 2025 CVE Published
- Dec 3, 2025 CVE Updated
- Apr 30, 2026 Distribution Patch