VDB

ALPINE-CVE-2024-24853

ALPINE-CVE-2024-24853 PUBLISHED CVSS 7.300000190734863 HIGH

Incorrect behavior order in transition between executive monitor and SMI transfer monitor (STM) in some Intel(R) Processor may allow a privileged user to potentially enable escalation of privilege via local access.

Risk Scores

CVSS 4.0
7.300000190734863
CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:P/VC:H/VI:H/VA:H/SC:H/SI:H/SA:H/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X

Affected Products

VendorProductVersions
Alpine:v3.19intel-ucode20191112-r0, 20190618-r0, 20190514a-r0
Alpine:v3.18intel-ucode20190918-r0, 20191113-r0, 20191115-r0
Alpine:v3.20intel-ucode20201110-r0, 20200609-r0, 20180312-r0
Alpine:v3.21intel-ucode20180312-r0, 20240813-r0, *
Alpine:v3.17intel-ucode20230214-r0, *, 20200508-r0
Alpine:v3.22intel-ucode20210608-r0, 0, 20130222-r0
Alpine:v3.24intel-ucode0, 0, 0
Alpine:v3.23intel-ucode0, 20251111-r0, 20250812-r0

Timeline

  • Aug 14, 2024 CVE Published
  • Jun 15, 2026 CVE Updated
  • Aug 8, 2026 Distribution Patch
Open in Interactive Console →
$ Console Community · 100/wk Open console ›