ALPINE-CVE-2023-46842
Unlike 32-bit PV guests, HVM guests may switch freely between 64-bit and other modes. This in particular means that they may set registers used to pass 32-bit-mode hypercall arguments to values outside of the range 32-bit code would be able to set them to. When processing of hypercalls takes a considerable amount of time, the hypervisor may choose to invoke a hypercall continuation. Doing so involves putting (perhaps updated) hypercall arguments in respective registers. For guests not running in 64-bit mode this further involves a certain amount of translation of the values. Unfortunately internal sanity checking of these translated values assumes high halves of registers to always be clear when invoking a hypercall. When this is found not to be the case, it triggers a consistency check in the hypervisor and causes a crash.
Risk Scores
Affected Products
| Vendor | Product | Versions |
|---|---|---|
| Alpine:v3.20 | xen | 4.2.2-r3, 0, 4.0.1-r0 |
| Alpine:v3.23 | xen | 4.1.0-r0, 4.1.2-r7, 4.1.2-r9 |
| Alpine:v3.21 | xen | 4.3.2-r0, 4.8.1-r2, 4.8.1-r1 |
| Alpine:v3.18 | xen | 4.1.1-r0, 4.16.1-r0, 4.16.0-r1 |
| Alpine:v3.16 | xen | 4.16.1-r6, 4.16.2-r0, 4.16.3-r0 |
| Alpine:v3.19 | xen | 4.6.0-r3, 0, 4.0.1-r0 |
| Alpine:v3.22 | xen | 4.9.1-r3, 4.9.1-r2, 4.9.1-r1 |
| Alpine:v3.17 | xen | 4.9.1-r3, 4.9.1-r2, 4.9.1-r1 |
Timeline
- May 16, 2024 CVE Published
- Dec 3, 2025 CVE Updated
- Apr 30, 2026 Distribution Patch