ALPINE-CVE-2022-40982 PUBLISHED CVSS 6.5 MEDIUM

Information exposure through microarchitectural state after transient execution in certain vector execution units for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.

Risk Scores

CVSS v3.1
6.5
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N

Affected Products

VendorProductVersions
Alpine:v3.16intel-ucode20230613-r0, 20230516a-r0, 20230512-r0
Alpine:v3.15xen4.7.1-r5, 4.7.2-r0, 4.8.1-r0
Alpine:v3.23intel-ucode20220809-r0, 20221108-r0, 20230214-r0
Alpine:v3.21xen4.9.1-r3, 0, 4.0.1-r0
Alpine:v3.17intel-ucode20200520-r0, 20200609-r0, 20200616-r0
Alpine:v3.21intel-ucode20191112-r0, 20190918-r0, 20190618-r0
Alpine:v3.17xen4.1.2-r11, 4.1.2-r12, 4.1.2-r3
Alpine:v3.20intel-ucode20220510-r0, 20230613-r0, 20230516a-r0
Alpine:v3.18xen4.5.1-r2, 4.2.2-r7, 4.2.2-r8
Alpine:v3.16xen4.5.0-r1, 4.9.1-r3, 4.9.1-r2
Alpine:v3.19xen4.12.0-r1, 4.12.0-r0, 4.11.1-r1
Alpine:v3.23xen4.9.1-r3, 0, 4.0.1-r0
Alpine:v3.20xen4.10.0-r0, 4.1.3-r0, 4.1.2-r9
Alpine:v3.19intel-ucode0, 20230613-r0, 20230516a-r0
Alpine:v3.18intel-ucode0, 20230613-r0, 20230516a-r0
Alpine:v3.15intel-ucode20230214-r0, 20230512-r0, 20230516a-r0
Alpine:v3.22xen4.13.0-r0, 4.13.0-r1, 4.13.0-r2
Alpine:v3.22intel-ucode20230613-r0, 20230516a-r0, 20230512-r0

Timeline

References

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