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ALPINE-CVE-2022-33745

ALPINE-CVE-2022-33745 PUBLISHED CVSS 8.800000190734863 HIGH

insufficient TLB flush for x86 PV guests in shadow mode For migration as well as to work around kernels unaware of L1TF (see XSA-273), PV guests may be run in shadow paging mode. To address XSA-401, code was moved inside a function in Xen. This code movement missed a variable changing meaning / value between old and new code positions. The now wrong use of the variable did lead to a wrong TLB flush condition, omitting flushes where such are necessary.

Risk Scores

CVSS 3.1
8.800000190734863
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H

Affected Products

VendorProductVersions
Alpine:v3.13xen4.1.3-r0, 4.10.0-r0, 4.10.0-r1
Alpine:v3.15xen4.3.2-r0, 4.3.2-r1, 4.3.2-r2
Alpine:v3.14xen4.8.1-r2, 4.1.2-r11, 4.14.1-r0
Alpine:v3.22xen4.9.1-r2, 0, 4.9.1-r3
Alpine:v3.21xen0, 4.0.1-r1, 4.0.1-r0
Alpine:v3.24xen0, 0
Alpine:v3.19xen4.9.0-r8, 4.0.1-r0, 4.0.1-r1
Alpine:v3.18xen4.3.0-r1, 0, 0
Alpine:v3.20xen4.4.2-r1, 4.9.0-r0, 4.4.1-r7
Alpine:v3.23xen4.7.1-r0, 4.0.1-r1, 4.0.1-r2
Alpine:v3.17xen4.7.0-r0, 4.6.3-r1, 4.6.3-r0

Timeline

  • Jul 26, 2022 CVE Published
  • Jun 15, 2026 CVE Updated
  • Aug 8, 2026 Distribution Patch
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