VDB

ALPINE-CVE-2022-27672

ALPINE-CVE-2022-27672 PUBLISHED CVSS 4.699999809265137 MEDIUM

When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT mode switch potentially resulting in information disclosure.

Risk Scores

CVSS 3.1
4.699999809265137
CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:N

Affected Products

VendorProductVersions
Alpine:v3.18xen4.2.0-r6, 0, 4.0.1-r2
Alpine:v3.19xen4.9.1-r3, 4.0.1-r1, 4.0.1-r2
Alpine:v3.21xen4.12.1-r1, 0, 4.9.1-r3
Alpine:v3.24xen0
Alpine:v3.16xen4.0.1-r0, 4.0.1-r1, 4.0.1-r2
Alpine:v3.17xen4.1.3-r0, 4.16.1-r6, 0
Alpine:v3.22xen0, 4.0.1-r1, 4.0.1-r3
Alpine:v3.20xen0, 4.9.1-r3, 4.9.1-r2
Alpine:v3.23xen4.16.2-r1, 0, 4.0.1-r0

Timeline

  • Mar 1, 2023 CVE Published
  • Apr 30, 2026 Distribution Patch
  • Jun 15, 2026 CVE Updated
Open in Interactive Console →
$ Console Community · 100/wk Open console ›