VDB
ALPINE-CVE-2018-12126
ALPINE-CVE-2018-12126
PUBLISHED
CVSS 5.599999904632568 MEDIUM
Microarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. A list of impacted products can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/SA00233-microcode-update-guidance_05132019.pdf
Risk Scores
CVSS 3.0
5.599999904632568
CVSS:3.0/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:N/A:N
Affected Products
| Vendor | Product | Versions |
|---|---|---|
| Alpine:v3.24 | intel-ucode | 0, 0, 0 |
| Alpine:v3.19 | xen | 4.9.0-r5, 4.9.1-r3, 4.9.1-r2 |
| Alpine:v3.23 | intel-ucode | 0, 0, 20130222-r0 |
| Alpine:v3.20 | xen | 4.8.1-r4, 4.9.0-r0, 4.9.0-r4 |
| Alpine:v3.12 | xen | 0, 4.1.2-r3, 4.1.2-r5 |
| Alpine:v3.15 | xen | 4.2.1-r7, 0, 0 |
| Alpine:v3.9 | xen | 4.6.0-r4, 4.7.1-r3, 4.7.1-r4 |
| Alpine:v3.20 | intel-ucode | 0, 20170511-r0, 20180108-r0 |
| Alpine:v3.7 | xen | 4.0.1-r1, 0, 4.0.1-r0 |
| Alpine:v3.17 | xen | 4.3.1-r2, 4.1.1-r1, 4.1.1-r2 |
| Alpine:v3.23 | xen | 4.6.0-r2, 4.10.0-r3, 4.10.0-r2 |
| Alpine:v3.22 | intel-ucode | 20180807a-r1, 0, 0 |
| Alpine:v3.21 | intel-ucode | 20190618-r0, 0, 20170511-r0 |
| Alpine:v3.21 | xen | 4.6.1-r2, 0, 0 |
| Alpine:v3.19 | intel-ucode | 20130222-r0, 20180312-r0, * |
| Alpine:v3.16 | xen | 4.9.0-r8, 4.9.1-r0, 4.9.1-r2 |
| Alpine:v3.11 | xen | 4.2.2-r2, 4.2.2-r10, 4.2.2-r0 |
| Alpine:v3.24 | xen | 0, 0 |
| Alpine:v3.14 | intel-ucode | 20130222-r0, 20180108-r0, 20180312-r0 |
| Alpine:v3.10 | xen | 4.3.2-r2, 4.3.2-r1, 4.3.2-r0 |
…and 10 more
Timeline
- May 30, 2019 CVE Published
- Apr 30, 2026 Distribution Patch
- Jun 9, 2026 CVE Updated